The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2009
Filed:
Nov. 12, 2005
Chia-wei Liu, Huatan Township, Changhua County, TW;
Jun Xiu Liu, Taichung, TW;
Chi-hsuen Chang, Hsinchu, TW;
Tzu-chiang Sung, Jhubei, TW;
Chung-i Chen, Hsinchu, TW;
Rann-shyan Yeh, Hsinchu, TW;
Chia-Wei Liu, Huatan Township, Changhua County, TW;
Jun Xiu Liu, Taichung, TW;
Chi-Hsuen Chang, Hsinchu, TW;
Tzu-Chiang Sung, Jhubei, TW;
Chung-I Chen, Hsinchu, TW;
Rann-Shyan Yeh, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits on a semiconductor substrate. A buried layer continuously extending underneath the first and second circuits is formed on the semiconductor substrate, wherein the buried layer interfaces with the first isolation ring for isolating the first and second circuits from a backside bias of the semiconductor substrate. An ion enhanced isolation layer is interposed between the buried layer and well regions on which devices of the first and second circuits are formed, wherein the ion enhanced isolation layer is doped with impurities of a polarity type different from that of the buried layer.