The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2009

Filed:

May. 27, 2005
Applicants:

Yoon-jong Song, Seoul, KR;

Young-nam Hwang, Gyeonggi-do, KR;

Sang-don Nam, Seoul, KR;

Sung-lae Cho, Gyeonggi-do, KR;

Gwan-hyeob Koh, Seoul, KR;

Choong-man Lee, Gyeonggi-do, KR;

Bong-jin Kuh, Gyeonggi-do, KR;

Yong-ho Ha, Gyeonggi-do, KR;

Su-youn Lee, Gyeonggi-do, KR;

Chang-wook Jeong, Seoul, KR;

Ji-hye Yi, Gyeonggi-do, KR;

Kyung-chang Ryoo, Gyeonggi-do, KR;

Se-ho Lee, Seoul, KR;

Su-jin Ahn, Seoul, KR;

Soon-oh Park, Gyeonggi-do, KR;

Jang-eun Lee, Gyeonggi-do, KR;

Inventors:

Yoon-Jong Song, Seoul, KR;

Young-Nam Hwang, Gyeonggi-do, KR;

Sang-Don Nam, Seoul, KR;

Sung-Lae Cho, Gyeonggi-do, KR;

Gwan-Hyeob Koh, Seoul, KR;

Choong-Man Lee, Gyeonggi-do, KR;

Bong-Jin Kuh, Gyeonggi-do, KR;

Yong-Ho Ha, Gyeonggi-do, KR;

Su-Youn Lee, Gyeonggi-do, KR;

Chang-Wook Jeong, Seoul, KR;

Ji-Hye Yi, Gyeonggi-do, KR;

Kyung-Chang Ryoo, Gyeonggi-do, KR;

Se-Ho Lee, Seoul, KR;

Su-Jin Ahn, Seoul, KR;

Soon-Oh Park, Gyeonggi-do, KR;

Jang-Eun Lee, Gyeonggi-do, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.


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