The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2009
Filed:
Sep. 12, 2005
Kamalesh K. Srivastava, Wappingers Falls, NY (US);
Subhash L. Shinde, Courtlandt Manor, NY (US);
Tien-jen Cheng, Bedford, NY (US);
Sarah H. Knickerbocker, Hopewell Junction, NY (US);
Roger A. Quon, Rhinebeck, NY (US);
William E. Sablinski, Beacon, NY (US);
Julie C. Biggs, Wappingers Falls, NY (US);
David E. Eichstadt, Park Ridge, IL (US);
Jonathan H. Griffith, LaGrangeville, NY (US);
Kamalesh K. Srivastava, Wappingers Falls, NY (US);
Subhash L. Shinde, Courtlandt Manor, NY (US);
Tien-Jen Cheng, Bedford, NY (US);
Sarah H. Knickerbocker, Hopewell Junction, NY (US);
Roger A. Quon, Rhinebeck, NY (US);
William E. Sablinski, Beacon, NY (US);
Julie C. Biggs, Wappingers Falls, NY (US);
David E. Eichstadt, Park Ridge, IL (US);
Jonathan H. Griffith, LaGrangeville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier layer is formed over an exposed portion of the seed layer, the exposed portion defined by a first patterned opening. The semiconductor device is annealed so as to cause atoms from the barrier layer to diffuse into the seed layer thereunderneath, wherein the annealing causes diffused regions of the seed layer to have an altered electrical resistivity and electrode potential with respect to undiffused regions of the seed layer.