The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2008

Filed:

Sep. 01, 2005
Applicants:

Steven D. Oliver, Boise, ID (US);

LU Velicky, Boise, ID (US);

William Mark Hiatt, Eagle, ID (US);

David R. Hembree, Boise, ID (US);

Mark E. Tuttle, Boise, ID (US);

Sidney B. Rigg, Meridian, ID (US);

James M. Wark, Boise, ID (US);

Warren M. Farnworth, Nampa, ID (US);

Kyle K. Kirby, Boise, ID (US);

Inventors:

Steven D. Oliver, Boise, ID (US);

Lu Velicky, Boise, ID (US);

William Mark Hiatt, Eagle, ID (US);

David R. Hembree, Boise, ID (US);

Mark E. Tuttle, Boise, ID (US);

Sidney B. Rigg, Meridian, ID (US);

James M. Wark, Boise, ID (US);

Warren M. Farnworth, Nampa, ID (US);

Kyle K. Kirby, Boise, ID (US);

Assignee:

Aptina Imaging Corporation, Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.


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