The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2008

Filed:

Feb. 22, 2007
Applicants:

Yuuichi Hirano, Tokyo, JP;

Shigeto Maegawa, Tokyo, JP;

Toshiaki Iwamatsu, Tokyo, JP;

Takuji Matsumoto, Tokyo, JP;

Shigenobu Maeda, Tokyo, JP;

Yasuo Yamaguchi, Tokyo, JP;

Inventors:

Yuuichi Hirano, Tokyo, JP;

Shigeto Maegawa, Tokyo, JP;

Toshiaki Iwamatsu, Tokyo, JP;

Takuji Matsumoto, Tokyo, JP;

Shigenobu Maeda, Tokyo, JP;

Yasuo Yamaguchi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01);
U.S. Cl.
CPC ...
Abstract

An isolation insulating film () of partial-trench type is selectively formed in an upper surface of a silicon layer (). A power supply line () is formed above the isolation insulating film (). Below the power supply line (), a complete isolation portion () reaching an upper surface of an insulating film () is formed in the isolation insulating film (). In other words, a semiconductor device comprises a complete-isolation insulating film which is so formed as to extend from the upper surface of the silicon layer () and reach the upper surface of insulating film () below the power supply line (). With this structure, it is possible to obtain the semiconductor device capable of suppressing variation in potential of a body region caused by variation in potential of the power supply line.


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