The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2008

Filed:

Jun. 30, 2005
Applicants:

Kuljit S. Bains, Olympia, WA (US);

Navneet Dour, Folsom, CA (US);

Hany Fahmy, Elk Grove, CA (US);

George Vergis, Hillsboro, OR (US);

Christopher E. Cox, Placerville, CA (US);

Inventors:

Kuljit S. Bains, Olympia, WA (US);

Navneet Dour, Folsom, CA (US);

Hany Fahmy, Elk Grove, CA (US);

George Vergis, Hillsboro, OR (US);

Christopher E. Cox, Placerville, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment may comprise memory with a memory array, a resistor coupled to a reference voltage, on die termination circuitry coupled with the resistor, and an input coupled to the on die termination circuitry and coupled with the memory array, the input to receive a calibration command to stop use of the input and the memory array and calibrate the on die termination circuitry with the resistor coupled to the reference voltage. Other embodiments are disclosed herein.


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