The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2008

Filed:

Jun. 27, 2003
Applicants:

Ramesh Gopalan, Fremont, CA (US);

Sridharan Srivatsan, Fremont, CA (US);

Katgenhalli Y. Ramanujam, Fremont, CA (US);

Tom NI, Pleasanton, CA (US);

Conan Chiang, Los Altos, CA (US);

Inventors:

Ramesh Gopalan, Fremont, CA (US);

Sridharan Srivatsan, Fremont, CA (US);

Katgenhalli Y. Ramanujam, Fremont, CA (US);

Tom Ni, Pleasanton, CA (US);

Conan Chiang, Los Altos, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for planarizing a semiconductor substrate is provided. The method initiates with tracking a signal corresponding to a thickness of a conductive film disposed on the semiconductor substrate. Then, a second derivative is calculated from data representing the tracked signal. Next, the onset of planarization is identified based upon a change in the second derivative. A CMP system configured to identify a transition between stages of the CMP operation is also provided.


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