The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2008

Filed:

May. 30, 2006
Applicants:

Masaru Kito, Yokohama, JP;

Ryota Katsumata, Yokohama, JP;

Hideaki Aochi, Kawasaki, JP;

Nobutoshi Aoki, Yokohama, JP;

Masaki Kondo, Kawasaki, JP;

Sanae Ito, Yokohama, JP;

Inventors:

Masaru Kito, Yokohama, JP;

Ryota Katsumata, Yokohama, JP;

Hideaki Aochi, Kawasaki, JP;

Nobutoshi Aoki, Yokohama, JP;

Masaki Kondo, Kawasaki, JP;

Sanae Ito, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device comprising at least one FET formed on the semiconductor substrate, wherein the FET comprises a source region, a drain region, a channel region formed between the source and drain regions and including a plurality of projected epitaxial silicon regions arranged in a width direction of the channel region, each of the projected epitaxial silicon regions having a triangular ridge portion, a gate insulating film formed on the channel region, and a gate electrode formed on the gate insulating film.


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