The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2008

Filed:

Jun. 14, 2006
Applicants:

Wilfried Von Ammon, Hocburg, AT;

Walter Haeckl, Zeilarn, DE;

Andreas Huber, Garching, DE;

Ulrich Lambert, Emmerting, DE;

Inventors:

Wilfried von Ammon, Hocburg, AT;

Walter Haeckl, Zeilarn, DE;

Andreas Huber, Garching, DE;

Ulrich Lambert, Emmerting, DE;

Assignee:

Siltronic AG, Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C30B 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a process for producing silicon semiconductor wafers, a silicon single crystal is pulled using the Czochralski method and is processed to form semiconductor wafers, a ratio V/G of pulling rate V and axial temperature gradient G at a growth front during the pulling of the single crystal being controlled in such a manner that agglomerated vacancy defects above a critical size are formed in the single crystal, the agglomerated vacancy defects, in a region of the semiconductor wafer that is of relevance to electronic components, shrinking during production of the components such that the size in this region no longer exceeds the critical size. Silicon semiconductor wafers with agglomerated vacancy defects in the relevant device region preferably contain agglomerated vacancy defects having an inner surface which is at least partially free of an oxide layer and a size of less than 50 nm.


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