The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2008
Filed:
Jun. 26, 2006
Eugene Youjun Chen, Fremont, CA (US);
Yiming Huai, Pleasanton, CA (US);
Alex Fischer Panchula, San Carlos, CA (US);
Lien-chang Wang, Fremont, CA (US);
Xiao Luo, Cupertino, CA (US);
Eugene Youjun Chen, Fremont, CA (US);
Yiming Huai, Pleasanton, CA (US);
Alex Fischer Panchula, San Carlos, CA (US);
Lien-Chang Wang, Fremont, CA (US);
Xiao Luo, Cupertino, CA (US);
Grandis, Inc., Milpitas, CA (US);
Renesas Technology Corp., Tokyo, JP;
Abstract
A method and system for providing a magnetic memory. The magnetic memory includes magnetic storage cells in an array, bit lines, and source lines. Each magnetic storage cell includes at least one magnetic element. The magnetic element(s) are programmable by write currents driven through the magnetic element(s). Each magnetic element has free and pinned layer(s) and a dominant spacer. The magnetic memory is configured such that either the read current(s) flow from the free layer(s) to the dominant spacer if the maximum low resistance state read current divided by the minimum low resistance state write current is greater than the maximum high resistance state read current divided by the minimum high resistance state write current or the read current(s) flow from the dominant spacer to the free layer(s) if the maximum low resistance state read current divided by the minimum low resistance state write current is less than the maximum high resistance state read current divided by the minimum high resistance state write current.