The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2008

Filed:

Dec. 10, 2004
Applicants:

Joong Jeon, Cupertino, CA (US);

Wei Zheng, Santa Clara, CA (US);

Mark Randolph, San Jose, CA (US);

Meng Ding, Mountain View, CA (US);

Hidehiko Shiraiwa, San Jose, CA (US);

Inventors:

Joong Jeon, Cupertino, CA (US);

Wei Zheng, Santa Clara, CA (US);

Mark Randolph, San Jose, CA (US);

Meng Ding, Mountain View, CA (US);

Hidehiko Shiraiwa, San Jose, CA (US);

Assignees:

Spansion LLC, Sunnyvale, CA (US);

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device may include an intergate dielectric layer of a high-K, high barrier height dielectric material interposed between a charge storage layer and a control gate. With this intergate high-K, high barrier height dielectric in place, the memory device may be efficiently erased using Fowler-Nordheim tunneling.


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