The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
May. 10, 2005
Jang Gyoo Yang, Sunnyvale, CA (US);
Daniel J. Hoffman, Saratoga, CA (US);
Steven C. Shannon, San Mateo, CA (US);
Douglas H. Burns, Saratoga, CA (US);
Wonseok Lee, Pleasanton, CA (US);
Kwang-soo Kim, Santa Clara, CA (US);
Jang Gyoo Yang, Sunnyvale, CA (US);
Daniel J. Hoffman, Saratoga, CA (US);
Steven C. Shannon, San Mateo, CA (US);
Douglas H. Burns, Saratoga, CA (US);
Wonseok Lee, Pleasanton, CA (US);
Kwang-Soo Kim, Santa Clara, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A plasma reactor has a dual frequency plasma RF bias power supply furnishing RF bias power comprising first and second frequency components, f(), f(), respectively, and an RF power path having an input end coupled to the plasma RF bias power supply and an output end coupled to the wafer support pedestal, and sensor circuits providing measurement signals representing first and second frequency components of a measured voltage and first and second frequency components of a measured current near the input end of the RF power path. The reactor further includes a processor for providing first and second frequency components of a wafer voltage signal as, respectively, a first sum of the first frequency components of the measured voltage and measured current multiplied by first and second coefficients respectively, and a second sum of the second frequency components of the measured voltage and measured current multiplied by third and fourth coefficients, respectively. A processor produces a D.C. wafer voltage by combining D.C. components of the first and second frequency components of the wafer voltage with an intermodulation correction factor that is the product of the D.C. components of the first and second components of the wafer voltage raised to a selected power and multiplied by a selected coefficient.