The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2008
Filed:
Jun. 07, 2005
Kaladhar Radhakrishnan, Chandler, AZ (US);
Nicholas L Holmberg, Gilbert, AZ (US);
Joel a Auernheimer, Phoenix, AZ (US);
Dustin P Wood, Chandler, AZ (US);
Kaladhar Radhakrishnan, Chandler, AZ (US);
Nicholas L Holmberg, Gilbert, AZ (US);
Joel A Auernheimer, Phoenix, AZ (US);
Dustin P Wood, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An array capacitor is provided. The array capacitor includes a plurality of ground planes inside a dielectric substrate, and a plurality of ground vias. The ground vias electrically connect the ground planes together. Further, the ground vias are connected to ground terminals of the array capacitor to enable electrical coupling between the ground planes and the ground terminals. The array capacitor further includes a plurality of power planes inside the dielectric substrate. The power planes and the ground planes are arranged alternatively inside the dielectric substrate. Each power plane comprises a plurality of power-plane-sections which are mutually electrically isolated. The array capacitor also includes a plurality of power vias which electrically connect the power planes together. Further, the power vias are connected to power terminals of the array capacitor to enable electrical coupling between the power planes and power terminals.