The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2008

Filed:

Apr. 20, 2006
Applicants:

Hsien-chang Chang, Tainan County, TW;

Chia-hsin Hou, Hsinchu, TW;

Tsu-yu Chu, Taoyuan County, TW;

Ko-ting Chen, Nan-Tou Hsien, TW;

Inventors:

Hsien-Chang Chang, Tainan County, TW;

Chia-Hsin Hou, Hsinchu, TW;

Tsu-Yu Chu, Taoyuan County, TW;

Ko-Ting Chen, Nan-Tou Hsien, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/425 (2006.01); H01L 29/167 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor substrate having an integrated circuit die area surrounded by a scribe lane is provided. Within the integrated circuit die area, a first trench isolation region and a second trench isolation region are formed on the semiconductor substrate, wherein the first trench isolation region isolates a first active device region from a second active device region, and the second trench isolation region comprises a plurality of trench dummy features for reducing loading effect. A first gate electrode is formed on the first active device region and a second gate electrode on the second active device region. The first active device region is masked, while the second active device region and the trench dummy features are exposed. An ion implantation process is then performed to implant dopant species into the second active device region.


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