The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2008
Filed:
Dec. 08, 2004
Shaofeng Yu, Plano, TX (US);
Haowen Bu, Plano, TX (US);
Jiong-ping LU, Richardson, TX (US);
Lindsey Hall, Plano, TX (US);
Shaofeng Yu, Plano, TX (US);
Haowen Bu, Plano, TX (US);
Jiong-Ping Lu, Richardson, TX (US);
Lindsey Hall, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit. The method for manufacturing the semiconductor device, among other steps, includes providing a capped polysilicon gate electrode () over a substrate (), the capped polysilicon gate electrode () including a buffer layer () located between a polysilicon gate electrode layer () and a protective layer (). The method further includes forming source/drain regions () in the substrate () proximate the capped polysilicon gate electrode (), removing the protective layer () and the buffer layer (), and siliciding the polysilicon gate electrode layer () to form a silicided gate electrode ().