The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2008

Filed:

Aug. 30, 2005
Applicants:

Alex J. Schrinksy, Boise, ID (US);

Mark E. Jost, Boise, ID (US);

Inventors:

Alex J. Schrinksy, Boise, ID (US);

Mark E. Jost, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for use in fabrication of a semiconductor device comprises forming a conformal conductive layer over a planarized surface of a dielectric layer, and within an opening formed in the dielectric layer. The opening will typically have an aspect ratio of about 4:1 or greater. An etch is performed with specified gasses under a range of specified conditions which removes the conformal conductive layer from the planarized surface, but which leaves unetched the conformal conductive layer within the opening.


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Schrinksy, Alex. (2008). Dry etching process to form a conductive layer within an opening without use of a mask during the formation of a semiconductor device (U.S. Patent No. 7326647). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7326647

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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