The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2008

Filed:

Jul. 08, 2004
Applicants:

Chun Ho Fan, Sham Tseng, HK;

Wing Keung Lam, Kowloon, HK;

Ming Wang Sze, Tsuen Wan, HK;

Sadak Thamby Labeeb, Tsuen Wan, HK;

Neil Mclellan, Danville, CA (US);

Mohan Kirloskar, Cupertino, CA (US);

Inventors:

Chun Ho Fan, Sham Tseng, HK;

Wing Keung Lam, Kowloon, HK;

Ming Wang Sze, Tsuen Wan, HK;

Sadak Thamby Labeeb, Tsuen Wan, HK;

Neil McLellan, Danville, CA (US);

Mohan Kirloskar, Cupertino, CA (US);

Assignee:

ASAT Ltd., Tsuen Wan, New Territories, HK;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A ball grid array package is manufactured by mounting a semiconductor die to a first surface of a substrate and mounting a die adapter to the semiconductor die. The semiconductor die is wire bonded to ones of conductive traces of the substrate. A collapsible spacer is mounted to the substrate and the substrate is releasably clamped to an upper side of a mold cavity. A heat spreader and at least one collapsible spacer are placed in the mold cavity such that the collapsible spacer is disposed between the heat spreader and the substrate. A molding compound is molded in the mold, thereby molding the semiconductor die, the substrate, the wire bonds, the die adapter, the at least one collapsible spacer and the heat spreader into the molding compound to provide a molded package. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated.


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