The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Mar. 21, 2006
Paul Stephen Andry, Yorktown Heights, NY (US);
Leena Paivikki Buchwalter, Hopewell Junction, NY (US);
Raymond R. Horton, Dover Plains, NY (US);
John Ulrich Knickerbocker, Monroe, NY (US);
Cornelia K. Tsang, Mohegan Lake, NY (US);
Steven Lorenz Wright, Cortlandt Manor, NY (US);
Paul Stephen Andry, Yorktown Heights, NY (US);
Leena Paivikki Buchwalter, Hopewell Junction, NY (US);
Raymond R. Horton, Dover Plains, NY (US);
John Ulrich Knickerbocker, Monroe, NY (US);
Cornelia K. Tsang, Mohegan Lake, NY (US);
Steven Lorenz Wright, Cortlandt Manor, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.