The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2007
Filed:
Feb. 14, 2005
Ju-wang Hsu, Taipei, TW;
Jyu-horng Shieh, Hsin-Chu, TW;
Hun-jan Tao, Hsinchu, TW;
Chang-yun Chang, Taipei, TW;
Zhong Tang Xuan, Kaohsiung, TW;
Sheng-da Liu, Hsinchu, TW;
Ju-Wang Hsu, Taipei, TW;
Jyu-Horng Shieh, Hsin-Chu, TW;
Hun-Jan Tao, Hsinchu, TW;
Chang-Yun Chang, Taipei, TW;
Zhong Tang Xuan, Kaohsiung, TW;
Sheng-Da Liu, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A multiple gate region FET device for forming up to 6 FET devices and method for forming the same, the device including a multiple fin shaped structure comprising a semiconductor material disposed on a substrate; said multiple fin shaped structure comprising substantially parallel spaced apart sidewall portions, each of said sidewall portions comprising major inner and outer surfaces and an upper surface; wherein, each of said surfaces comprises a surface for forming an overlying field effect transistor (FET).