The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2007
Filed:
Nov. 30, 2005
Marwan H. Khater, Poughkeepsie, NY (US);
James S. Dunn, Jericho, VT (US);
David L. Harame, Essex Junction, VT (US);
Alvin J. Joseph, Williston, VT (US);
Qizhi Liu, Essex Junction, VT (US);
Francois Pagette, Fishkill, NY (US);
Stephen A. St. Onge, Colchester, VT (US);
Andreas D. Stricker, Essex Junction, VT (US);
Marwan H. Khater, Poughkeepsie, NY (US);
James S. Dunn, Jericho, VT (US);
David L. Harame, Essex Junction, VT (US);
Alvin J. Joseph, Williston, VT (US);
Qizhi Liu, Essex Junction, VT (US);
Francois Pagette, Fishkill, NY (US);
Stephen A. St. Onge, Colchester, VT (US);
Andreas D. Stricker, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.