The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2007
Filed:
May. 25, 2005
Chun Ho Fan, Tsuen Wan, HK;
Neil Mclellan, Danville, CA (US);
Wing Him Lau, Yuen Long, HK;
Emily Shui Ming Tse, Sai Wan Ho, HK;
Chun Ho Fan, Tsuen Wan, HK;
Neil McLellan, Danville, CA (US);
Wing Him Lau, Yuen Long, HK;
Emily Shui Ming Tse, Sai Wan Ho, HK;
ASAT Ltd., Tsuen Wan New Territories, HK;
Abstract
A process for fabricating an integrated circuit package. At least a first side of a leadframe strip is selectively etched to define portions of a die attach pad and at least one row of contacts adjacent the die attach pad. A carrier strip is laminated to the first side of the leadframe strip and a second side of the leadframe strip is selectively etched to thereby define a remainder of the die attach pad and the at least one row of contacts. A semiconductor die is mounted to the die attach pad, on the second side of the leadframe strip and the semiconductor die is wire bonded to ones of the contacts. The second side of the leadframe strip is encapsulating, including the semiconductor die and wire bonds, in a molding material. The carrier strip is removed from the leadframe strip and the integrated circuit package is singulated from a remainder of the leadframe strip.