The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
May. 03, 2004
Gordon W. Roberts, Montreal, CA;
Antonio H. Chan, Brossard, CA;
Geoffrey D. Duerden, Montreal, CA;
Mohamed M. Hafed, Montreal, CA;
Sébastien Laberge, Montreal, CA;
Bardia Pishdad, Montreal, CA;
Clarence K. L. Tam, Montreal, CA;
Gordon W. Roberts, Montreal, CA;
Antonio H. Chan, Brossard, CA;
Geoffrey D. Duerden, Montreal, CA;
Mohamed M. Hafed, Montreal, CA;
Sébastien Laberge, Montreal, CA;
Bardia Pishdad, Montreal, CA;
Clarence K. L. Tam, Montreal, CA;
DFT Microsystems, Inc., Burlington, MA (US);
Abstract
A module (') containing an integrated testing system () that includes one or more measurement engines () tightly coupled with a compute engine (). The one or more measurement engines include at least one stimulus instrument () for exciting circuitry of a device-under-test () with one or more stimulus signals, and at least one measurement instrument () that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry () for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine () providing two-way communications between the integrated testing system automated testing equipment () and/or a dedicated user interface () residing on a host computer ().