The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2007

Filed:

Apr. 05, 2004
Applicants:

Chung-wah N. Ip, Fremont, CA (US);

Lawrence Loh, Milpitas, CA (US);

Howard Wong-toi, Albany, CA (US);

Harry D. Foster, Plano, TX (US);

Inventors:

Chung-Wah N. Ip, Fremont, CA (US);

Lawrence Loh, Milpitas, CA (US);

Howard Wong-Toi, Albany, CA (US);

Harry D. Foster, Plano, TX (US);

Assignee:

Jasper Design Automation, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

To perform functional verification of a digital design that includes one or more datapaths, a formal verification system includes a datapath abstraction tool. The datapath abstraction tool detects a datapath in a circuit design and performs an appropriate abstraction of the datapath. The tool may also deduce datapath elements from identified ones as well as link the abstractions of particular datapath elements. The abstraction tool then passes the circuit design with the abstraction to the verification software to simplifying the formal verification process.


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