The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2007
Filed:
Dec. 17, 2004
Mark R. Richards, Tigard, OR (US);
Daniel C. Diana, Portland, OR (US);
Hitesh Windlass, Hillsboro, OR (US);
Wayne K. Ford, Beaverton, OR (US);
Ebrahim Andideh, Portland, OR (US);
Mark R. Richards, Tigard, OR (US);
Daniel C. Diana, Portland, OR (US);
Hitesh Windlass, Hillsboro, OR (US);
Wayne K. Ford, Beaverton, OR (US);
Ebrahim Andideh, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
According to one aspect of the invention, a memory array and a method of constructing a memory array are provided. An insulating layer is formed on a semiconductor substrate. A first metal stack is then formed on the insulating layer. The first metal stack is etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. The polymeric layer has a surface with a plurality of roughness formations. A second metal stack is formed on the polymeric layer with an interface layer, which is thicker than the heights of the roughness formations. Then the second metal stack is etched to form second metal lines. Memory cells are formed wherever a second metal line extends over a first metal line.