The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2007
Filed:
Oct. 09, 2003
Shriram Ramanathan, Hillsboro, OR (US);
Grant Kloster, Lake Oswego, OR (US);
Patrick Morrow, Portland, OR (US);
Vijayakumar Ramachandrarao, Hillsboro, OR (US);
Scott List, Beaverton, OR (US);
Shriram Ramanathan, Hillsboro, OR (US);
Grant Kloster, Lake Oswego, OR (US);
Patrick Morrow, Portland, OR (US);
Vijayakumar RamachandraRao, Hillsboro, OR (US);
Scott List, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The invention provides a stacked wafer structure with decreased failures. In one embodiment, there is a barrier layer deposited on exposed surfaces of conductors that extend across a distance between first and second device structures. The barrier layer may prevent diffusion and electromigration of the conductor material, which may decrease incidences of shorts and voids in the stacked wafer structure.