The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2007

Filed:

Oct. 25, 2005
Applicants:

Yoshihiro Ikeda, Tokyo, JP;

Hiroshi Ishida, Tokyo, JP;

Inventors:

Yoshihiro Ikeda, Tokyo, JP;

Hiroshi Ishida, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

A non-volatile semiconductor memory device includes a semiconductor substrate, an insulating film formed on the semiconductor substrate, a plurality of memory cells formed on the semiconductor substrate, a plurality of first assist gates extending toward the memory cell, a connection portion connecting end portions of the first assist gates, a second assist gate extending toward the memory cell, a first select transistor controlling whether to apply a voltage to an area under the first assist gate, a second select transistor controlling whether to apply a voltage to an area under the second assist gate, and an impurity region. The insulating film formed under an intersection area of the connection portion and the impurity region has a thickness larger than the insulating film formed under the first and second assist gates. A non-volatile semiconductor memory device capable of ensuring a writing speed as well as reliability can thus be obtained.


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