The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2007

Filed:

Jun. 28, 2004
Applicants:

Francis J. Carney, Gilbert, AZ (US);

Phillip Celaya, Gilbert, AZ (US);

Joseph K. Fauty, Mesa, AZ (US);

James P. Letterman, Mesa, AZ (US);

Stephen St. Germain, Scottsdale, AZ (US);

Jay A. Yoder, Phoenix, AZ (US);

Inventors:

Francis J. Carney, Gilbert, AZ (US);

Phillip Celaya, Gilbert, AZ (US);

Joseph K. Fauty, Mesa, AZ (US);

James P. Letterman, Mesa, AZ (US);

Stephen St. Germain, Scottsdale, AZ (US);

Jay A. Yoder, Phoenix, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.


Find Patent Forward Citations

Carney, Francis. (2007). Multi-chip semiconductor connector assembly method (U.S. Patent No. 7202105). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7202105

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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