Semiconductor memory arrangements with crown shaped capacitor arrangements trenched in interlayer dielectric film

Abstract

A capacitor consisting of a storage electrode (), a capacitor dielectric film () and a plate electrode () is formed in a trench formed through dielectric films (and) stacked on a semiconductor substrate () and buried wiring layers (and) are formed under the capacitor. As the capacitor is formed not in the semiconductor substrate but over it, there is room in area in which the capacitor can be formed and the difficultly of forming wiring is reduced by using the wiring layers (and) for a global word line and a selector line. As the upper face of an dielectric film () which is in contact with the lower face of wiring () in a peripheral circuit area is extended into a memory cell area and is in contact with the side of the capacitor (), step height between the peripheral circuit area and the memory cell area is remarkably reduced.