The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Jul. 26, 2005
Applicants:

Jui-meng Jao, Miao-Li Hsien, TW;

Chien-li Kuo, Hsin-Chu, TW;

Inventors:

Jui-Meng Jao, Miao-Li Hsien, TW;

Chien-Li Kuo, Hsin-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

A flip-chip package includes a packaging substrate; an integrated circuit die affixed to the packaging substrate, wherein the integrated circuit die includes an active integrated circuit surrounded by a peripheral die seal ring therein; and a thermal stress releasing pad disposed in a stress-releasing area that is at a corner of the integrated circuit die outside the die seal ring, wherein the thermal stress releasing pad is connected to the packaging substrate by using a solder bump, which, in turn, is connected to a dummy heat-spreading metal plate embedded in the packaging substrate so as to form a heat shunting path for reducing thermal stress during temperature cycling test.


Find Patent Forward Citations

Jao, Jui-Meng. (2007). Flip chip package with reduced thermal stress (U.S. Patent No. 7176555). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7176555

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…