The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2006
Filed:
Sep. 15, 2004
Seiichi Kondo, Tsukuba, JP;
Kaori Misawa, Tsukuba, JP;
Shunichi Tokitoh, Tsukuba, JP;
Takashi Nasuno, Tsukuba, JP;
Seiichi Kondo, Tsukuba, JP;
Kaori Misawa, Tsukuba, JP;
Shunichi Tokitoh, Tsukuba, JP;
Takashi Nasuno, Tsukuba, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
A first CVD dielectric layer is deposited on a surface of a semiconductor substrate. Next, low-k layers are deposited in at least two different steps to form one of a via-layer dielectric film and a wiring-layer dielectric film on the first CVD dielectric layer. Immediately after the depositions, thermal treatment is performed. A second CVD dielectric layer is deposited on the low-k layers. A groove is formed in the second CVD dielectric layer and the low-k layers. A metal layer is deposited on that structure, filling the groove. The metal layer is removed from the second CVD dielectric layer by chemical mechanical polishing.