The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2006
Filed:
May. 29, 2003
Applicants:
Mauro J. Kobrinsky, Hillsboro, OR (US);
Sourav Chakravarty, Hillsboro, OR (US);
R. Scott List, Beaverton, OR (US);
Inventors:
Mauro J. Kobrinsky, Hillsboro, OR (US);
Sourav Chakravarty, Hillsboro, OR (US);
R. Scott List, Beaverton, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
A closed-loop based timing signal distribution architecture includes at least one signal source coupled to a signal path disposed in a closed loop arrangement to facilitate generation of a standing wave signal within the signal path. In one embodiment, at least one receiver is coupled to the signal path to generate at least one digital clock signal based upon the standing wave signal.