The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2006
Filed:
Jan. 08, 2003
William F. Landers, Wappingers Falls, NY (US);
Thomas M. Shaw, Peekskill, NY (US);
Diana Llera-hurlburt, Fishkill, NY (US);
Scott W. Crowder, Ossining, NY (US);
Vincent J. Mcgahay, Poughkeepsie, NY (US);
Sandra G. Malhotra, Beacon, NY (US);
Charles R. Davis, Fishkill, NY (US);
Ronald D. Goldblatt, Yorktown Heights, NY (US);
Brett H. Engel, Hopewell Junction, NY (US);
William F. Landers, Wappingers Falls, NY (US);
Thomas M. Shaw, Peekskill, NY (US);
Diana Llera-Hurlburt, Fishkill, NY (US);
Scott W. Crowder, Ossining, NY (US);
Vincent J. McGahay, Poughkeepsie, NY (US);
Sandra G. Malhotra, Beacon, NY (US);
Charles R. Davis, Fishkill, NY (US);
Ronald D. Goldblatt, Yorktown Heights, NY (US);
Brett H. Engel, Hopewell Junction, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An on-chip redundant crack termination barrier structure, or crackstop, provides a barrier for preventing defects, cracks, delaminations, and moisture/oxidation contaminants from reaching active circuit regions. Conductive materials in the barrier structure design permits wiring the barriers out to contact pads and device pins for coupling a monitor device to the chip for monitoring barrier integrity.