The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2006
Filed:
Feb. 03, 2004
Chiao-shun Chuang, Hsinchu, TW;
Chien-ping Chang, Hsinchu, TW;
Mao-song Tseng, Hsinchu, TW;
Hsing-huang Hsieh, Hsinchu, TW;
Chiao-Shun Chuang, Hsinchu, TW;
Chien-Ping Chang, Hsinchu, TW;
Mao-Song Tseng, Hsinchu, TW;
Hsing-Huang Hsieh, Hsinchu, TW;
Mosel Vitelic, Inc., Hsinchu, TW;
Abstract
In one embodiment of the invention, a semiconductor device set includes at least one trench-typed MOSFET and a trench-typed termination structure. The trench-typed MOSFET has a trench profile and includes a gate oxide layer in the trench profile, and a polysilicon layer on the gate oxide layer. The trench-typed termination structure has a trench profile and includes an oxide layer in the trench profile. A termination polysilicon layer with discrete features separates the termination polysilicon layer. An isolation layer covers the termination polysilicon layer and filling the discrete features. The trench-typed MOSFET and the trench-typed termination structure may be formed on a DMOS device including an N+ silicon substrate, an N epitaxial layer on the N+ silicon substrate, and a P epitaxial layer on the N epitaxial layer. The trench profiles of the trench-typed MOSFET and of the trench-typed termination structure may penetrate through the P epitaxial layer into the N epitaxial layer.