The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7060193 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 13, 2006

Filed:

Jul. 05, 2002
Applicants:

Pradeep Yelehanka, Singapore, SG;

Sanford Chu, Singapore, SG;

Chit Hwei NG, Singapore, SG;

Jia Zhen, Singapore, SG;

Purakh Verma, Singapore, SG;

Inventors:

Pradeep Yelehanka, Singapore, SG;

Sanford Chu, Singapore, SG;

Chit Hwei Ng, Singapore, SG;

Jia Zhen, Singapore, SG;

Purakh Verma, Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01B 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A new method of provided for forming in one plane layers of semiconductor material having both high and low dielectric constants. Layers, having selected and preferably non-identical parameters of dielectric constants, are successively deposited interspersed with layers of etch stop material. The layers can be etched, creating openings there-through that can be filled with a layer of choice.


Find Patent Forward Citations

Yelehanka, Pradeep. (2006). Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits (U.S. Patent No. 7060193). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7060193

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