The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2006
Filed:
Dec. 17, 2003
Antonio L. P. Rotondaro, Dallas, TX (US);
Douglas E. Mercer, Richardson, TX (US);
Luigi Colombo, Dallas, TX (US);
Mark Robert Visokay, Richardson, TX (US);
Haowen Bu, Plano, TX (US);
Malcolm John Bevan, Dallas, TX (US);
Antonio L. P. Rotondaro, Dallas, TX (US);
Douglas E. Mercer, Richardson, TX (US);
Luigi Colombo, Dallas, TX (US);
Mark Robert Visokay, Richardson, TX (US);
Haowen Bu, Plano, TX (US);
Malcolm John Bevan, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Methods are disclosed that fabricating semiconductor devices with high-k dielectric layers. The invention removes portions of deposited high-k dielectric layers not below gates and covers exposed portions (e.g., sidewalls) of high-k dielectric layers during fabrication with an encapsulation layer, which mitigates defects in the high-k dielectric layers and contamination of process tools. The encapsulation layer can also be employed as an etch stop layer and, at least partially, in comprising sidewall spacers. As a result, a semiconductor device can be fabricated with a substantially uniform equivalent oxide thickness.