The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2006
Filed:
Oct. 10, 2002
Sarathy Rajagopalan, Milpitas, CA (US);
Kishor Desai, Fremont, CA (US);
John P. Mccormick, Palo Alto, CA (US);
Maniam Alagaratnam, Cupertino, CA (US);
Sarathy Rajagopalan, Milpitas, CA (US);
Kishor Desai, Fremont, CA (US);
John P. McCormick, Palo Alto, CA (US);
Maniam Alagaratnam, Cupertino, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method of assembling at least a first integrated circuit and a second integrated circuit into a multi chip module. The first integrated circuit is attached and electrically connected to a first substrate to form a first assembly, which is tested to ensure that it functions properly. The second integrated circuit is attached and electrically connected to a second substrate to form a second assembly, which is also tested to ensure that it functions properly. The first assembly is attached and electrically connected to the second assembly to form the multi chip module.