The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2006

Filed:

Nov. 17, 2004
Applicants:

Nicholas H. Tripsas, San Jose, CA (US);

Colin S. Bill, Cupertino, CA (US);

Michael A. Vanbuskirk, Saratoga, CA (US);

Matthew Buynoski, Palo Alto, CA (US);

Tzu-ning Fang, Palo Alto, CA (US);

Wei Daisy Cai, Fremont, CA (US);

Suzette Pangrle, Cupertino, CA (US);

Steven Avanzino, Cupertino, CA (US);

Inventors:

Nicholas H. Tripsas, San Jose, CA (US);

Colin S. Bill, Cupertino, CA (US);

Michael A. VanBuskirk, Saratoga, CA (US);

Matthew Buynoski, Palo Alto, CA (US);

Tzu-Ning Fang, Palo Alto, CA (US);

Wei Daisy Cai, Fremont, CA (US);

Suzette Pangrle, Cupertino, CA (US);

Steven Avanzino, Cupertino, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/36 (2006.01); G11C 27/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present memory structure includes thereof a first conductor, a second conductor, a resistive memory cell connected to the second conductor, a first diode connected to the resistive memory cell and the first conductor, and oriented in the forward direction from the resistive memory cell to the first conductor, and a second diode connected to the resistive memory cell and the first conductor, in parallel with the first diode, and oriented in the reverse direction from the resistive memory cell to the first conductor. The first and second diodes have different threshold voltages.


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