The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2006
Filed:
Sep. 02, 1999
Barney M. Cohen, Santa Clara, CA (US);
Suraj Rengarajan, Sunnyvale, CA (US);
Xiangbing LI, San Jose, CA (US);
Kenny King-tai Ngan, Fremont, CA (US);
Peijun Ding, San Jose, CA (US);
Barney M. Cohen, Santa Clara, CA (US);
Suraj Rengarajan, Sunnyvale, CA (US);
Xiangbing Li, San Jose, CA (US);
Kenny King-Tai Ngan, Fremont, CA (US);
Peijun Ding, San Jose, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
The present invention generally provides a method for improving fill and electrical performance of metals deposited on patterned dielectric layers. Apertures such as vias and trenches in the patterned dielectric layer are etched to enhance filling and then cleaned in the same chamber to reduce metal oxides within the aperture. The invention also provides cleaning the patterned dielectric layer in a processing chamber with a first plasma consisting essentially of argon, wherein the first plasma is generated by supplying power to a coil surrounding the processing chamber and supplying bias to a substrate support member supporting the substrate, cleaning the patterned dielectric layer in the processing chamber with a second plasma consisting essentially of hydrogen and helium, wherein the second plasma is generated by increasing the supply of power to the coil surrounding the processing chamber and reducing the supply of bias to the substrate support member supporting the substrate, depositing a barrier layer on the patterned dielectric layer after exposing the dielectric layer to the first plasma and the second plasma, and depositing a metal on the barrier layer. Furthermore, the sequential plasma treatments can be practiced in a variety of plasma processing chambers of an integrated process sequence, including pre-clean chambers, physical vapor deposition chambers, etch chambers, and other plasma processing chambers.