The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2005

Filed:

Apr. 07, 2004
Applicants:

Glenn G. Daves, Beacon, NY (US);

Jason Frankel, Beacon, NY (US);

William F. Shutler, Wappingers Falls, NY (US);

Anthony Wayne Sigler, Pine Plains, NY (US);

Herbert I. Stoller, Poughkeepsie, NY (US);

John Vetrero, Marlboro, NY (US);

Cathy Ann Zadany, Hopewell Junction, NY (US);

Inventors:

Glenn G. Daves, Beacon, NY (US);

Jason Frankel, Beacon, NY (US);

William F. Shutler, Wappingers Falls, NY (US);

Anthony Wayne Sigler, Pine Plains, NY (US);

Herbert I. Stoller, Poughkeepsie, NY (US);

John Vetrero, Marlboro, NY (US);

Cathy Ann Zadany, Hopewell Junction, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/44 ; H01L021/48 ; H01L021/50 ;
U.S. Cl.
CPC ...
Abstract

A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer translating the first grid in an x-axis direction. A second translation layer is coupled to the first translation layer, the second translation layer for translating said wiring connections from the first grid in a y-axis direction, the y-axis direction being orthogonal to the x-axis direction. The second translation layer is further coupled to the second grid.


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