The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2005
Filed:
Mar. 07, 2003
Yuri Solomentsev, Allen, TX (US);
Matthew S. Angyal, Stormville, NY (US);
Errol Todd Ryan, Austin, TX (US);
Susan Gee-young Kim, Evanston, IL (US);
Yuri Solomentsev, Allen, TX (US);
Matthew S. Angyal, Stormville, NY (US);
Errol Todd Ryan, Austin, TX (US);
Susan Gee-Young Kim, Evanston, IL (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
The present invention provides a method for forming a low-k dielectric structure on a substratethat includes depositing, upon the substrate, a dielectric layerA multi-film cap layeris deposited upon the dielectric layer. The multi-film cap layer includes firstand secondfilms, with the second film being disposed between the dielectric layer and the first film. The first film typically has a removal rate associated therewith that is less than the removal rate associated with the second film. A deposition layeris deposited upon the multi-film cap layer and subsequently removed. The properties of the multi-film cap layer are selected so as to prevent the dielectric layer from being exposed/removed during removal of the deposition film. In this manner, a deposition layer, having variable rates of removal, such as copper, may be planarized without damaging the underlying dielectric layer.