The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6929992 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 16, 2005

Filed:

Dec. 17, 2003
Applicants:

Ihsan J. Djomehri, Mountain View, CA (US);

Qi Xiang, San Jose, CA (US);

Jung-suk Goo, Stanford, CA (US);

James N. Pan, Fishkill, NY (US);

Inventors:

Ihsan J. Djomehri, Mountain View, CA (US);

Qi Xiang, San Jose, CA (US);

Jung-Suk Goo, Stanford, CA (US);

James N. Pan, Fishkill, NY (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/8238 ;
U.S. Cl.
CPC ...
Abstract

The threshold voltage shift exhibited by strained silicon NMOS devices is compensated with respect to the threshold voltages of PMOS devices formed on the same substrate by increasing the work function of the NMOS gates. The NMOS gate work function exceeds the PMOS gate work function so as to compensate for a difference in the respective NMOS and PMOS threshold voltages. The NMOS gates are preferably fully silicided while the PMOS gates are partially silicided.


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Djomehri, Ihsan. (2005). Strained silicon mosfets having nmos gates with work functions for compensating nmos threshold voltage shift (U.S. Patent No. 6929992). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6929992

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