The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2005
Filed:
Dec. 01, 2003
Srinivasan Chakravarthi, Richardson, TX (US);
PR Chidambaram, Richardson, TX (US);
Robert C. Bowen, Allen, TX (US);
Haowen Bu, Plano, TX (US);
Srinivasan Chakravarthi, Richardson, TX (US);
Pr Chidambaram, Richardson, TX (US);
Robert C. Bowen, Allen, TX (US);
Haowen Bu, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method of forming a retrograde well in a transistor is provided. A transistor structure having a substrate, a gate, and a gate oxide layer between the substrate and the gate is formed. The substrate includes a channel region located generally below the gate. A first dopant is implanted into the channel region. A second dopant is implanted into the substrate to form a doped source region and a doped drain region. A third dopant is implanted into the gate oxide layer. A source/drain anneal is performed to form a source and a drain in the doped source region and the doped drain region, respectively. The source/drain anneal causes a portion of the first dopant in the channel region to be attracted by the third dopant into the gate oxide layer.