The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 26, 2005
Filed:
Jan. 07, 2003
Akella V. S. Satya, Milpitas, CA (US);
Gustavo A. Pinto, Belmont, CA (US);
David L. Adler, San Jose, CA (US);
Robert Thomas Long, Santa Cruz, CA (US);
Neil Richardson, Palo Alto, CA (US);
Kurt H. Weiner, San Jose, CA (US);
David J. Walker, Sunol, CA (US);
Lynda C. Mantalas, Campbell, CA (US);
Akella V. S. Satya, Milpitas, CA (US);
Gustavo A. Pinto, Belmont, CA (US);
David L. Adler, San Jose, CA (US);
Robert Thomas Long, Santa Cruz, CA (US);
Neil Richardson, Palo Alto, CA (US);
Kurt H. Weiner, San Jose, CA (US);
David J. Walker, Sunol, CA (US);
Lynda C. Mantalas, Campbell, CA (US);
KLA-Tencor Technologies Corporation, Milpitas, CA (US);
Abstract
Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.