The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2005

Filed:

May. 08, 2002
Applicants:

Mu-yi Liu, Taichung, TW;

Kwang-yang Chan, Hsinchu, TW;

Yen-hung Yeh, Taoyuan Hsien, TW;

Tso-hung Fan, Taipei Hsien, TW;

Tao-cheng LU, Kaoshiung, TW;

Inventors:

Mu-Yi Liu, Taichung, TW;

Kwang-Yang Chan, Hsinchu, TW;

Yen-Hung Yeh, Taoyuan Hsien, TW;

Tso-Hung Fan, Taipei Hsien, TW;

Tao-Cheng Lu, Kaoshiung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L029/78 ;
U.S. Cl.
CPC ...
Abstract

A structure of a 2-bit mask ROM device and a fabrication method thereof are provided. The memory structure includes a substrate, a gate structure, a 2-bit coding implantation region, a spacer, a buried drain region, an isolation structure and a word line. The gate structure is disposed on the substrate, while the coding implantation region is located in the substrate under the side of the gate structure. Further, at least one spacer is arranged beside the side of the gate structure and a buried drain region is disposed in the substrate beside the side of the spacer. Moreover, the buried drain region and the coding implantation region further comprise a buffer region in between. Additionally, an insulation structure is arranged on the substrate that is above the buried drain region, while the word lien is disposed on the gate structure.


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