The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Mar. 14, 2002
Takashi Yamada, Ebina, JP;
Tsutomu Sato, Yokohama, JP;
Shinichi Nitta, Yokohama, JP;
Hajime Nagano, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Hisato Oyamatsu, Yokohama, JP;
Yoshihiro Minami, Fujisawa, JP;
Shinji Miyano, Yokohama, JP;
Osamu Fujii, Yokohama, JP;
Takashi Yamada, Ebina, JP;
Tsutomu Sato, Yokohama, JP;
Shinichi Nitta, Yokohama, JP;
Hajime Nagano, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Hisato Oyamatsu, Yokohama, JP;
Yoshihiro Minami, Fujisawa, JP;
Shinji Miyano, Yokohama, JP;
Osamu Fujii, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A semiconductor device includes first and second semiconductor layers and first and second MOS transistors. The first semiconductor layer is provided on and electrically connected to the semiconductor substrate. The second semiconductor layer is provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity. The first and second MOS transistors are respectively provided on the first and second semiconductor layers, and each has a gate electrode arranged parallel to a boundary between the first and second semiconductor layers.