The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2005

Filed:

Dec. 28, 2002
Applicants:

Mark A. Stettler, Hillsboro, OR (US);

Borna Obradovic, Hillsboro, OR (US);

Martin D. Giles, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Inventors:

Mark A. Stettler, Hillsboro, OR (US);

Borna Obradovic, Hillsboro, OR (US);

Martin D. Giles, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/336 ;
U.S. Cl.
CPC ...
Abstract

Method to form a structure to decrease area capacitance within a buried insulator device structure is disclosed. A portion of the substrate layer of a buried insulator structure opposite the insulator layer from the gate is doped with the same doping polarity as the source and drain regions of the device, to provide reduced area capacitance. Such doping may be limited to portions of the substrate which are not below the gate.


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