The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2005
Filed:
Dec. 23, 2003
Shigeru Atsumi, Yokohama, JP;
Masao Kuriyama, Fujisawa, JP;
Akira Umezawa, Yokohama, JP;
Hironori Banba, Kamakura, JP;
Tadayuki Taura, Zushi, JP;
Hidetoshi Saito, Yokohama, JP;
Shigeru Atsumi, Yokohama, JP;
Masao Kuriyama, Fujisawa, JP;
Akira Umezawa, Yokohama, JP;
Hironori Banba, Kamakura, JP;
Tadayuki Taura, Zushi, JP;
Hidetoshi Saito, Yokohama, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A semiconductor integrated circuit device includes fuse cells arranged at a fuse cell array, a fuse cell data program and erase circuit, a fuse cell data control circuit, and fuse data latch circuits. The fuse cells include erasable and programmable nonvolatile memory cells. The fuse cell data program and erase circuit programs fuse data to the memory cells and erases the fuse data from the memory cells. The fuse cell data control circuit controls read out timing of the fuse data stored in the memory cells based on a signal generated upon detection of power-on. The fuse data latch circuits latch the fuse data read out from the memory cells.