The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2004
Filed:
Aug. 15, 2003
Chih-Ning Wu, Hsin-Chu, TW;
Ming-Hsing Liu, Tai-Nan, TW;
Hsiao-Pang Chou, Taipei Hsien, TW;
Ching-Piao Lin, Taipei Hsien, TW;
Pei-Jen Wang, Hsin-Chu, TW;
United Microelectronics Corp., Hsin-Chu, TW;
Abstract
The present invention pertains to a via-first dual damascene process. A semiconductor substrate having a conductive structure and a dielectric layer on the semiconductor substrate is provided. The dielectric layer has a via opening exposing the conductive structure. The via opening is filled with a gap-filling polymer to form a gap-filling polymer (GFP) layer on the dielectric layer. The GFP layer is etched back to a predetermined depth such that an exposed surface of the GFP layer is lower than surface of the dielectric layer to form a recess, thereby exposing portions of sidewalls of the via opening. A surface treatment for altering surface property of the sidewalls and the exposed surface of the GFP layer is then carried out, thereby preventing a subsequent deep UV photoresist from interacting with the sidewalls or the exposed surface of the GFP layer either in a chemical or physical way.