The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2004

Filed:

Nov. 09, 2001
Applicant:
Inventors:

Brian S. Doyle, Cupertino, CA (US);

Brian Roberds, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/976 ;
U.S. Cl.
CPC ...
H01L 2/976 ;
Abstract

A transistor using mechanical stress to alter carrier mobility. Voids are formed in one or more of the source, drain, channel or gate regions to introduce tensile or compressive stress to improve short channel effects.


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Doyle, Brian. (2004). Mos transistor using mechanical stress to control short channel effects (U.S. Patent No. 6740913). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6740913

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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