The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2004

Filed:

Sep. 18, 2002
Applicant:
Inventors:

Ernest D. Adams, III, Austin, TX (US);

Matthew A. Purdy, Austin, TX (US);

Gregory A. Cherry, Austin, TX (US);

Eric O. Green, Austin, TX (US);

Elfido Coss, Jr., Austin, TX (US);

Brian K. Cusson, Austin, TX (US);

Naomi M. Jenkins, Round Rock, TX (US);

Patrick M. Cowan, Pflugerville, TX (US);

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/126 ;
U.S. Cl.
CPC ...
G01R 3/126 ;
Abstract

A method and an apparatus for the determination of a process flow based upon fault detection. A process step upon a workpiece is performed. Fault detection analysis based upon the process step performed upon the workpiece is performed. A workpiece routing process is performed based upon the fault detection analysis. The wafer routing process includes using a controller to perform one or a rework process routing, a non-standard process routing, a fault verification process routing, a normal process routing, or a termination process routing, based upon the fault detection analysis.


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